1. Technical Field
The present disclosure relates to a semiconductor circuit, and more particularly, to a leakage current detection circuit that detects a substrate leakage current and a gate leakage current of a CMOS transistor.
2. Discussion of the Related Art
When an MOS transistor is turned off, there is no channel formed in the MOS transistor so that current cannot flow between the drain and source regions of the MOS transistor. When a voltage lower than the threshold voltage of the MOS transistor is applied to the gate of the MOS transistor, the energy level of the conduction band of the channel region, which is determined by the voltage applied to the gate, becomes higher than the energy level of the conduction band of the drain and source regions. Charges in the source and drain regions having relatively low energy levels cannot pass through the channel region having a relatively high energy level and disposed between the source and drain regions. Thus, the current cannot flow in the channel region.
When the MOS transistor is turned on, the charges in the source and drain regions are moved through the channel that is formed in the direction of the length L of the gate. When a voltage that is higher than the threshold voltage is applied to the gate, the energy level of the conduction band of the channel region becomes lower than the energy level present when the MOS is turned off. Thus, the charges in the source and drain regions can easily move.
With the development of improved semiconductor manufacturing techniques, the sizes of integrated elements are scaled down in order to increase the number of integrated transistors. An MOS transistor is scaled down so that the absolute length L and absolute width W of the gate of the MOS transistor are reduced, but the ratio W/L of the length L to the width W of the gate of the MOS transistor is maintained.
When the absolute length L of the gate of the MOS transistor is reduced due to scaling down the MOS transistor, a leakage current between the drain and source of the MOS transistor is easily generated, even when the MOS transistor is turned off. As described above, a voltage lower than the threshold voltage, when applied to the gate of the MOS transistor, increases the energy level of the conduction band of the channel region when the MOS transistor is turned off. However, the width of the conduction band corresponding to the reduced length L of the channel is decreased, and thus charges penetrating the conduction band are generated to cause a leakage current. Here, this leakage current is defined as a substrate leakage current.
The MOS transistor is scaled down in consideration of reducing the voltage applied to the gate of the MOS transistor. Thus, scaling down of the MOS transistor can increase the number of integrated MOS transistors and reduce power consumption of a circuit composed of the MOS transistors. To reduce the voltage applied to the gate, the thickness of a gate insulating layer should be decreased. When the gate insulating layer is thick, charges disposed on both sides of the gate insulating layer cannot move through the gate insulating layer unless they get an enormous amount of energy. When the gate insulating layer becomes thin, however, there exist charges penetrating the gate insulating layer to generate a leakage current. This leakage current is called the gate leakage current.
The ratio W/L of the length L to the width W of the gate is an important factor in determining the current-voltage characteristic of the corresponding MOS transistor. When the length L of the gate is long and the width W is wide, the substrate leakage current does not have a large effect on the current-voltage characteristic of the MOS transistor. Particularly, the gate leakage current hardly affects the current-voltage characteristic of the MOS transistor. When the MOS transistor is scaled down, however, the effect of the gate leakage current, as well as the effect of the substrate leakage current on the current-voltage characteristic of the MOS transistor, cannot be ignored.
Conventionally, a variation in the substrate leakage current and/or a variation in the gate leakage current in response to a variation in the size of the MOS transistor were detected and reflected in the circuit design and process design. In general, the variation of one of the substrate leakage current and the gate leakage current was detected.
A conventional method of measuring the substrate leakage current and gate leakage current was carried out on a specific region of a semiconductor device not just on one MOS transistor. Furthermore, there was a method of detecting only variations in the substrate leakage current in response to variations in the size of the MOS transistor to compare the detected variations in the substrate leakage current or detecting only variations in the gate leakage current in response to variations in the size of the MOS transistor to compare the detected variations in the gate leakage current. However, using this method it is difficult to judge which one of the substrate leakage current and the gate leakage current generated in the same semiconductor device has a dominant effect on the current-voltage characteristic of the MOS transistor.